Paper Contents
Abstract
The world of today is all digital. The two biggest issues with digital gadgets are battery life andspeed. There are several approaches of constructing the devices to get around these problems. Onelow power design method is Gate Diffusion Input (GDI). This study examines the most recentdevelopment in the field of low power designing, the GDI method. For this inquiry, a large numberof publications are evaluated. Modeling, application, and the construction of the GDI cell are allreviewed. This report also verifies a comparison of the GDI approach with other designingtechniques. Digital circuit designs are created using TANNER S-EDIT 12.0 tools, and simulation isperformed with TANNER SPICE 15.0 version tool. When compared to other approaches such asPTL, GDI, and MGDI techniques, the power dissipation and power delay in CMOS design aresignificantly higher. By using the low power design methodologies of GDI and MGDI 6, transistorcount and area will be decreased. Using the newest GDI methods is the aim of this article. This studyshows that the main use of this technology is in digital circuits.
Copyright
Copyright © 2024 Behera Sai Charan. This is an open access article distributed under the Creative Commons Attribution License.
